The present invention relates generally to methods of rough polishing semiconductor wafers. The invention particularly relates to a method of rough polishing silicon wafers to reduce the surface roughness of the wafers.
Polished semiconductor wafers are prepared from a single crystal ingot which undergoes trimming and orientation flattening prior to slicing the ingot into individual wafers. The edges of the wafers are rounded to avoid wafer damage during further processing. The wafers are then treated with an abrasive slurry (lapped) to remove surface damage induced by the slicing process and to make the opposed surfaces of each wafer flat and parallel. After the lapping process, the wafers are subjected to chemical etching to remove mechanical damage produced by the prior shaping steps. At least one surface of each wafer is polished with a colloidal silica slurry and a chemical etchant to ensure that the wafer has a highly reflective, damage-free surface. The wafers are then cleaned and inspected prior to being packaged.
Silicon wafers are typically polished using a two step method of rough polishing for stock removal followed by finish polishing to reduce nonspecularly reflected light (haze). An unpolished wafer includes high and low frequency components of roughness on its surface. The high frequency roughness causes high light scatter from the surface due to haze. The rough polishing and subsequent finish polishing stages minimize the high and low frequency surface roughness and reduce haze.
A silicon wafer is prepared for polishing by wax bonding the wafer to a ceramic polishing block which is then mounted on the arm of the polisher apparatus. The polisher includes a ceramic turntable which is overlaid with a hard polyurethane impregnated felt pad. In a typical two step polishing process, the polisher arm is lowered onto the pad and the turntable is rotated while a sodium stabilized colloidal silica slurry and an alkaline etchant are dispensed onto the pad surface. The surface of the wafer is rough polished for eight to ten minutes to remove 15-20 .mu.m of silicon (Si &lt;100&gt;) from the surface of the wafer.
The polishing is achieved through a combination of pressure, temperature, mechanical abrasive force and chemical reaction. The colloidal abrasive and the pressure applied to the silicon wafer (about nine lb/in.sup.2 of silicon surface exposed) elevate the temperature to 50.degree. to 55.degree. C. to facilitate the chemical reaction, while the alkaline etchant accelerates the stock removal. When stock removal is completed, the flow of colloidal silica slurry and alkaline etchant is stopped. The wafer is then treated with an acidic quench solution followed by a water wash and rinse. Afterwards, the polisher arm is raised and the ceramic block is demounted, water rinsed and transferred to a finish polisher.
During the finish polishing process, the ceramic block is mounted onto the finish polisher arm which is lowered onto a soft polyurethane pad on a ceramic turntable. The turntable is rotated while an ammonia stabilized colloidal silica slurry and an alkaline etchant are dispensed onto the pad. The surface of the wafer is finish polished at about five lb/in.sup.2 of silicon and 30.degree.-37.degree. C. for four to six minutes to remove 0.2-0.5 .mu.m of silicon (Si &lt;100&gt;) from the surface of the wafer. The colloidal silica slurry and alkaline etchant are then discontinued. The wafer is treated with the acidic quench solution described above and water rinsed. The polisher arm is raised and the ceramic block is demounted. The wafer is water rinsed and demounted from the block before it is stored in a Teflon cassette and transported for cleaning.
Silicon wafers that are polished using the two step method have greater surface roughness and haze than wafers that have been polished using a three step method. In the three step method, the wafers are subjected to an intermediate polish before being finish polished. The intermediate polish is performed to provide a smoother wafer by further reducing the low frequency component of roughness. Stock removal of 15-20 .mu.m silicon &lt;100&gt; is accomplished in twenty minutes at 35.degree.-45.degree. C. and 4.3-5.7 lb/in.sup.2 when the turntable is rotated and a sodium stabilized colloidal silica slurry is applied to the wafer. After a wafer is quenched and water rinsed, the ceramic block is demounted and transferred to another polishing machine for intermediate stock removal. The intermediate polishing is performed using a softer pad at a lower pressure of 2.1-2.8 lb/in.sup.2 and a lower temperature of 28.degree.-32.degree. C. to remove 2-4 .mu.m silicon &lt;100&gt; in ten minutes. The wafer is quenched and water rinsed before the ceramic block is demounted and transferred to the finish polisher. The wafer is finish polished for 8-10 minutes on a high nap pad (28.degree.-32.degree. C., 1.4 lb/in.sup.2, 30 rpm) using an ammonia stabilized colloidal silica slurry to render a haze free wafer surface. The wafer is then treated with an acidic quench solution and water rinsed. After the polisher arm is raised and the ceramic block is demounted, the wafer is water rinsed, demounted from the block, stored and transported for cleaning.
The three step polishing method improves the surface roughness and haze of the polished wafer. A disadvantage associated with the three step process, however, is the additional cost of the intermediate polisher and the complexity of adding an additional polishing operation to the process.
There is a need for a simple, economical rough polishing method that can provide wafers having less surface roughness.